Done by; Iman Sofea, Fatin Adira, Beh Soo Yuan, Hidayah, Dorothea & Nadiah Nazira.
Chapter 5 : Bus System
Introduction
Bus: Communication pathway connecting two or more devices
System Bus : Connects the CPU with main memory and other system components
Peripheral Devices : Devices other than the CPU and primary storage
Bus Clock Pulse : Common timing reference for all attached devices
Data transfer : Rate at which data is transmitted thorugh a medium or communication channel, as
measurement in data units per time interval
Bus Protocol : The format, content and timing data, memory addresses and control messages sent
across the bus
Internal & External Buses
Bus Hierarchy
Standards Bus Architecture
Performance of a bus can be
defined by
Transfer Time
- Amount of time taken for a data to be delivered in a single
transaction
- Example : Transfer time defines how long processor will have to wait
when it fetches
the instruction
Bandwidth
- Measures the capacity of the bus - How much can the bus send at one time
Bus Standards
Industry
Standard Architecture (ISA) Bus
The
most common bus in the PC world.
ISA
= Industry Standard Architecture
The
word "standard", in this case it actually fits. The ISA bus is still
a mainstay in even
the
newest computers.
Micro
Channel Architecture (MCA) Bus
MCA
also called the Micro Channel bus
MCA
= "Micro Channel Architecture"
IBM's
attempt to replace the ISA bus with something "bigger and
better".
Extended
Industry Standard Architecture (EISA) Bus
EISA
= Extended Industry Standard Architecture.
EISA
bus never became widely used and cannot be considered an industry standard
VESA
Local Bus (VLB)
The first local bus to gain popularity
VESA local bus (also called VL-Bus or VLB) was introduced in 1992.
VESA = Video Electronics Standards
Association
Major reason for the development of VLB
was to improve video performance in PCs.
Peripheral
Component Interconnect (PCI) Local Bus
Most
popular local I/O bus
PCI Bus Performance :
Burst Mode
PCI bus transfer information in a burst mode, where after an initial address is provided
multiple sets of data can be trasnmitted in a row. This works in a way familiar to how
cache bursting works
Bus Mastering
PCI supports full bus mastering, which
leads to improved performance
High Bandwidth Options
The PCI bus specification version 2.1
calls for expandability to 64 bits and 66 MHz
speed
Accelerated
Graphics Port (AGP)
AGP
was developed in response to the trend towards greater and greater
performance requirements for video; (to increase bandwidth between the
main processor and the video subsystem)
